1. Field of the Invention
The present invention relates to a semiconductor device multilayer wiring structure and to a process for production of the same, and, more particularly, the present invention relates to a semiconductor device multilayer wiring structure which is free from poor connections and the like and is high in reliability even when the contact portions are made finer and to a process for the production of the same.
2. Description of the Related Art
Along with the greater degree of integration of semiconductor devices, multiple layers for wiring are being laid on the surfaces of semiconductor substrates. Further, the increasing miniaturization of wiring has made the reliability of the wiring a problem. As a result, there is a demand for improved wiring reliability.
At the present time, the main method used in the contact burying technology for semiconductor devices of a multilayer wiring structure is the one in which a contact hole is formed in an interlayer insulating layer on a bottom conductive layer, then the contact hole is filled or buried with a top conductive layer, thereby connecting the bottom conductive layer and top conductive layer through the contact hole. When burying with the conductive layer, use is made of the high temperature bias sputtering method, the CVD method, the selective growth method, etc. This contact burying method has the advantage of a high reliability for the wiring connections.
Along with the increasing miniaturization of semiconductor devices, however, the contact holes have also become miniaturized and it is becoming difficult to stably bury the resultant finer contact holes.
Therefore, the method of pillar formation, which enables easy miniaturization of the contact portions, has been drawing attention. In the pillar formation method, before forming the interlayer insulating layer on the surface of the bottom conductive layer, a pillar connection portion (contact portion) is formed at a predetermined location of the surface of the bottom conductive layer, then the interlayer insulating layer is formed and then the etch back method or the like is used to selectively remove the interlayer insulating layer to expose only the top end of the pillar connection portion. Subsequent to this, the top conductive layer is formed on the interlayer insulating layer, then the top conductive layer and the bottom conductive layer are connected and wired through the pillar connection portion.
It is considered that with this pillar formation method, miniaturization of the pillar connection portion would be easier than with the method of burying fine contact holes.
The pillar formation method, however, has been considered difficult to commercially apply due to the complexity of the method of formation of the pillar connection portion itself, the difficulty in controlling the formation of the pillar connection portion (liftoff, selective growth, etc.), the strict demands on precision positioning of the bottom conductive layer and the pillar connection portion, and other reasons.